A64 -- Morello Instructions (alphabetic order)

ADD (extended register): Add (extended register).

ADD (immediate): Add (immediate).

ADRDP: Form DDC-relative address to 4KB page.

ADRP: Form PCC-relative address to 4KB page.

ALIGND: Align Down.

ALIGNU: Align Up.

BICFLGS (immediate): Bitwise Bit Clear (immediate) on flags field.

BICFLGS (register): Bitwise Bit Clear on flags field.

BLR (indirect): Branch with Link to capability Register.

BLR (memory indirect): Unseal load, branch and link.

BLRR: Branch with Link to capability Register with possible switch to Restricted.

BLRS (capability): Branch with Link to sealed capability.

BLRS (pair of capabilities): Branch with Link to sealed capability Register with possible switch to Restricted.

BR (indirect): Branch to capability Register.

BR (memory indirect): Unseal load and branch.

BRR: Branch to capability Register with possible switch to Restricted.

BRS (capability): Branch to sealed capability.

BRS (pair of capabilities): Branch to sealed capability pair.

BUILD: Build capability from untagged and possibly sealed bit pattern.

BX: Branch Exchange.

CAS: Compare and Swap capabilities in memory.

CASA: Compare and Swap capabilities in memory with acquire.

CASAL: Compare and Swap capabilities in memory with acquire and release.

CASL: Compare and Swap capabilities in memory with release.

CFHI: Copy From High.

CHKEQ: Check for bit equality of two capabilities, setting flags.

CHKSLD: Check if capability is sealed, setting flags.

CHKSS: Check Subset, setting flags.

CHKSSU: Check Subset, setting flags and conditionally unseal.

CHKTGD: Check if capability has its tag bit set, setting flags.

CLRPERM (immediate): Clear capability permissions (immediate).

CLRPERM (register): Clear capability Permissions (scalar).

CLRTAG: Clear capability Tag.

CMP: Compare capabilities: an alias of SUBS.

CPY: Copy Capability register.

CPYTYPE: Set capability value to the Capability ObjectType of another capability.

CPYVALUE: Set capability value to Capability Value of another capability.

CSEAL: Conditionally Seal capability.

CSEL: Conditional Select.

CTHI: Copy To High.

CVT (to capability): Convert pointer to capability offset from a capability.

CVT (to pointer): Convert capability to pointer, setting flags.

CVTD (to capability): Convert pointer to capability offset from DDC.

CVTD (to pointer): Convert capability to pointer offset from DDC, setting flags.

CVTDZ: Convert pointer to capability offset from DDC, with null capability from zero semantics.

CVTP (to capability): Convert pointer to capability offset from PCC.

CVTP (to pointer): Convert capability to pointer offset from PCC, setting flags.

CVTPZ: Convert pointer to capability offset from PCC, with null capability from zero semantics.

CVTZ: Convert pointer to capability offset from a capability, with null capability from zero semantics.

EORFLGS (immediate): Bitwise Exclusive OR (immediate) on flags field.

EORFLGS (register): Bitwise Exclusive OR (register) on flags field.

GCBASE: Get the Base field of a capability.

GCFLGS: Get the Flags field of a capability.

GCLEN: Get the Length of a capability.

GCLIM: Get the Limit of a capability.

GCOFF: Get the offset of a capability.

GCPERM: Get the Permissions field of a capability.

GCSEAL: Get the sealed status of a capability.

GCTAG: Get the Tag field of a capability.

GCTYPE: Get the ObjectType field of a capability.

GCVALUE: Get the Value field of a capability.

LDAPR: Load-Acquire RCpc capability.

LDAR (capability, alternate base): Load-Acquire capability via alternate base.

LDAR (capability, normal base): Load-Acquire capability.

LDAR (integer): Load-Acquire Register via alternate base.

LDARB: Load-Acquire Register Byte via alternate base.

LDAXP: Load-Acquire Exclusive Pair of capabilities.

LDAXR: Load-Acquire Exclusive capability.

LDCT: Load capability tags.

LDNP: Load Pair of capabilities, with non-temporal hint.

LDP (post-indexed): Load Pair of capabilities (immediate post-index).

LDP (pre-indexed): Load Pair of capabilities (immediate pre-index).

LDP (signed offset): Load Pair of capabilities (signed offset).

LDPBLR: Load Pair of capabilities and Branch with Link.

LDPBR: Load Pair of capabilities and Branch.

LDR (literal): Load capability (literal).

LDR (post-indexed): Load capability (immediate post-indexed).

LDR (pre-indexed): Load capability (immediate pre-indexed).

LDR (register offset, capability, alternate base): Load capability (register) via alternate base.

LDR (register offset, capability, normal base): Load capability (register).

LDR (register offset, integer): Load Register (register) via alternate base.

LDR (register offset, SIMD&FP): Load SIMD&FP Register (register) via alternate base.

LDR (unsigned offset, capability, alternate base): Load capability (unsigned offset) via alternate base.

LDR (unsigned offset, capability, normal base): Load capability (unsigned offset).

LDR (unsigned offset, integer): Load Register (unsigned offset) via alternate base.

LDRB (register offset): Load Register Byte (register) via alternate base.

LDRB (unsigned offset): Load Register Byte (unsigned offset) via alternate base.

LDRH: Load Register Halfword (register) via alternate base.

LDRSB: Load Register Signed Byte (register) via alternate base.

LDRSH: Load Register Signed Halfword (register) via alternate base.

LDTR: Load capability (unprivileged).

LDUR (capability, alternate base): Load capability (unscaled) via alternate base.

LDUR (capability, normal base): Load capability (unscaled).

LDUR (integer): Load Register (unscaled) via alternate base.

LDUR (SIMD&FP): Load SIMD&FP Register (unscaled) via alternate base.

LDURB: Load Register Byte (unscaled) via alternate base.

LDURH: Load Register Halfword (unscaled) via alternate base.

LDURSB: Load Register Signed Byte (unscaled) via alternate base.

LDURSH: Load Register Signed Halfword (unscaled) via alternate base.

LDURSW: Load Register Signed Word (unscaled) via alternate base.

LDXP: Load Exclusive Pair of capabilities.

LDXR: Load Exclusive capability.

MOV: Move between registers: an alias of CPY.

MRS: Move System Register to Capability register.

MSR: Move Capability register to System Register.

ORRFLGS (immediate): Bitwise OR (immediate) on flags field.

ORRFLGS (register): Bitwise OR on flags field.

RET: Return from subroutine.

RETR: Return from subroutine with possible switch to Restricted.

RETS (capability): Return to sealed capability.

RETS (pair of capabilities): Return to sealed capability pair.

RRLEN: Round Representable Length.

RRMASK: Round Representable Mask.

SCBNDS (immediate): Set Bounds (immediate).

SCBNDS (register): Set Bounds.

SCBNDSE: Set Bounds Exact.

SCFLGS: Set the Flags field of a capability.

SCOFF: Set the offset field of a capability.

SCTAG: Set the Capability Tag field.

SCVALUE: Set value field of a capability.

SEAL (capability): Seal capability.

SEAL (immediate): Seal capability (immediate).

STCT: Store capability tags.

STLR (capability, alternate base): Store-Release capability via alternate base.

STLR (capability, normal base): Store-Release capability.

STLR (integer): Store-Release Register via alternate base.

STLRB: Store-Release Register Byte via alternate base.

STLXP: Store-Release Exclusive Pair of capabilities.

STLXR: Store-Release Exclusive capability.

STNP: Store Pair of capabilities, with non-temporal hint.

STP (post-indexed): Store Pair of capabilities (immediate post-index).

STP (pre-indexed): Store Pair of capabilities (immediate pre-index).

STP (signed offset): Store Pair of capabilities (signed offset).

STR (post-indexed): Store capability (immediate post-indexed).

STR (pre-indexed): Store capability (immediate pre-index).

STR (register offset, capability, alternate base): Store capability (register) via alternate base.

STR (register offset, capability, normal base): Store capability (register).

STR (register offset, integer): Store Register (register) via alternate base.

STR (register offset, SIMD&FP): Store SIMD&FP Register (register) via alternate base.

STR (unsigned offset, capability, alternate base): Store capability (unsigned offset) via alternate base.

STR (unsigned offset, capability, normal base): Store capability (unsigned offset).

STR (unsigned offset, integer): Store Register (unsigned offset) via alternate base.

STRB (register offset): Store Register Byte (register) via alternate base.

STRB (unsigned offset): Store Register Byte (unsigned offset) via alternate base.

STRH: Store Register Halfword (register) via alternate base.

STTR: Store capability (unprivileged).

STUR (capability, alternate base): Store capability (unscaled) via alternate base.

STUR (capability, normal base): Store capability (unscaled).

STUR (integer): Store Register (unscaled) via alternate base.

STUR (SIMD&FP): Store SIMD&FP Register (unscaled) via alternate base.

STURB: Store Register Byte (unscaled) via alternate base.

STURH: Store Register Halfword (unscaled) via alternate base.

STXP: Store Exclusive Pair of capabilities.

STXR: Store Exclusive capability.

SUB: Subtract (immediate).

SUBS: Subtract, setting flags.

SWP: Swap capabilities in memory.

SWPA: Swap capabilities in memory with acquire.

SWPAL: Swap capabilities in memory with acquire and release.

SWPL: Swap capabilities in memory with release.

UNSEAL: Unseal Capability.