Store capability (immediate post-indexed) determines the base register to be used, derives an address from the base register, and stores a capability to memory from a Capability register. The address to use is derived from a base register value in A64 or capability base register in C64 and a immediate offset scaled by 16. For information about memory accesses, see Load/Store addressing modes.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Ct | ||||||||||||||||
| opc<1> | opc<0> | ||||||||||||||||||||||||||||||
integer t = UInt(Ct); integer n = UInt(Rn); bits(64) offset = SignExtend(imm9:'0000', 64);
| <Ct> |
Is the capability name of the transfer register, encoded in the "Ct" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Cn|CSP> |
Is the capability name of the base register or stack pointer, encoded in the "Rn" field. |
| <imm> |
Is the signed immediate byte offset, a multiple of 16 in the range -4096 to 4080, encoded in the "imm9" field. |
CheckCapabilitiesEnabled(); VirtualAddress base; Capability data; acctype = AccType_NORMAL; boolean rt_unknown = FALSE; if n == t && n != 31 then c = ConstrainUnpredictable(Unpredictable_WBOVERLAPST); assert c IN {Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP}; case c of when Constraint_NONE rt_unknown = FALSE; // value stored is original value when Constraint_UNKNOWN rt_unknown = TRUE; // value stored is UNKNOWN when Constraint_UNDEF UNDEFINED; when Constraint_NOP EndOfInstruction(); base = BaseReg[n]; bits(64) addr = VAddress(base); if rt_unknown then data = Capability UNKNOWN; else data = C[t]; bits(64) cap_required = CAP_PERM_STORE; if CapIsTagSet(data) then cap_required = cap_required OR CAP_PERM_STORE_CAP; if CapIsLocal(data) then cap_required = cap_required OR CAP_PERM_STORE_LOCAL; VACheckAddress(base, addr, CAPABILITY_DBYTES, cap_required, acctype); MemC[addr, acctype] = data; BaseReg[n] = VAAdd(base,offset);
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
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