Swap capabilities in memory with acquire and release determines the base register to be used, derives an address from the base register, atomically loads a Capability register from the calculated address in memory, and atomically stores another Capability register back to the same calculated address. The Capability register initially loaded from the calculated address in memory is returned to the destination Capability register. This instruction loads from memory with acquire and release semantics as described in Load-Acquire, Load-AcquirePC, and Store-Release.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | Cs | 1 | 0 | 0 | 0 | 0 | 0 | Rn | Ct | ||||||||||||
| A | R | ||||||||||||||||||||||||||||||
integer t = UInt(Ct); integer s = UInt(Cs); integer n = UInt(Rn); AccType ldacctype = if Ct != '11111' then AccType_ORDEREDATOMICRW else AccType_ATOMICRW; AccType stacctype = AccType_ORDEREDATOMICRW;
| <Cs> |
Is the capability name of the register to be stored, encoded in the "Cs" field. |
| <Ct> |
Is the capability name of the register to be loaded, encoded in the "Ct" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Cn|CSP> |
Is the capability name of the base register or stack pointer, encoded in the "Rn" field. |
CheckCapabilitiesEnabled(); VirtualAddress base = BaseReg[n]; Capability data; Capability store_data; bits(64) addr = VAddress(base); store_data = C[s]; VACheckAddress(base, addr, CAPABILITY_DBYTES, CAP_PERM_LOAD, ldacctype); bits(64) cap_required = CAP_PERM_STORE; if CapIsTagSet(store_data) then cap_required = cap_required OR CAP_PERM_STORE_CAP; if CapIsLocal(store_data) then cap_required = cap_required OR CAP_PERM_STORE_LOCAL; VACheckAddress(base, addr, CAPABILITY_DBYTES, cap_required, stacctype); data = MemAtomicC(addr, MemAtomicOp_SWP, store_data, ldacctype, stacctype); data = CapSquashPostLoadCap(data, base); C[t] = data;
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
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