Subtract, setting flags if the Capability Tag of the first source Capability register is not the same as the Capability Tag of the second source Capability register subtracts the Capability Tag of the first source Capability register from the Capability Tag of the second source Capability register and writes the result to the destination 64-bit register otherwise subtracts the Value field of the first source Capability register from the Value field of the second source Capability register and writes the result to the destination 64-bit register. The instruction updates the condition flags based on the result.
This instruction is used by the alias CMP.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | Cm | 1 | 0 | 0 | 1 | 1 | 0 | Cn | Rd | ||||||||||||
integer d = UInt(Rd); integer n = UInt(Cn); integer m = UInt(Cm);
| <Xd> |
Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field. |
| <Cn> |
Is the capability name of the first source register, encoded in the "Cn" field. |
| <Cm> |
Is the capability name of the second source register, encoded in the "Cm" field. |
CheckCapabilitiesEnabled(); Capability operand1 = C[n]; Capability operand2 = C[m]; boolean tag1 = CapIsTagSet(operand1); boolean tag2 = CapIsTagSet(operand2); bits(64) result; bits(4) nzcv; if tag1 != tag2 then bits(2) interim; bits(2) tvalue1 = if tag1 then '01' else '00'; bits(2) tvalue2 = if tag2 then '01' else '00'; (interim, nzcv) = AddWithCarry(tvalue1, NOT(tvalue2), '1'); result = ZeroExtend(interim,64); else bits(64) value1 = CapGetValue(operand1); bits(64) value2 = CapGetValue(operand2); (result, nzcv) = AddWithCarry(value1, NOT(value2), '1'); PSTATE.<N,Z,C,V> = nzcv; X[d] = result;
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
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