MSR

Move Capability register to System Register allows the PE to write a capability to an AArch64 System register from a capability general-purpose register.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	1	0	1	0	0	0	o0	op1			CRn				CRm				op2			Ct
											L

MSR (<systemreg>|S<op0>_<op1>_<Cn>_<Cm>_<op2>), <Ct>

integer sys_op0 = 2 + UInt(o0); integer sys_op1 = UInt(op1); integer sys_crn = UInt(CRn); integer sys_crm = UInt(CRm); integer sys_op2 = UInt(op2); integer t = UInt(Ct);

Assembler Symbols

<op0>

Is the op0 specifier, encoded in o0:

o0	<op0>
0	2
1	3

<op1>

Is the unsigned immediate operand, in the range 0 to 7, encoded in the "op1" field.

<Cn>	Is the name Cn, with n in the range 0 to 15, encoded in the "CRn" field.

<Cm>	Is the name Cm, with m in the range 0 to 15, encoded in the "CRm" field.

<op2>

Is the unsigned immediate operand, in the range 0 to 7, encoded in the "op2" field.

<Ct>	Is the capability name of the transfer register, encoded in the "Ct" field.

Operation

CheckCapabilitiesEnabled(); AArch64.CapSysRegWrite(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, C[t]);

Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	1	0	1	0	0	0	o0	op1			CRn				CRm				op2			Ct
											L

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	1	0	1	0	0	0	o0	op1			CRn				CRm				op2			Ct
											L

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	0	1	0	1	0	0	0	o0	op1			CRn				CRm				op2			Ct
											L