Unsigned Multiply High multiplies two 64-bit register values, and writes bits[127:64] of the 128-bit result to the 64-bit destination register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | Rm | 0 | (1) | (1) | (1) | (1) | (1) | Rn | Rd | ||||||||||||
| U | Ra | ||||||||||||||||||||||||||||||
integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer a = UInt(Ra); // ignored by UMULH/SMULH integer destsize = 64; integer datasize = destsize; boolean unsigned = (U == '1');
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the first general-purpose source register holding the multiplicand, encoded in the "Rn" field. |
| <Xm> |
Is the 64-bit name of the second general-purpose source register holding the multiplier, encoded in the "Rm" field. |
bits(datasize) operand1 = X[n]; bits(datasize) operand2 = X[m]; integer result; result = Int(operand1, unsigned) * Int(operand2, unsigned); X[d] = result<127:64>;
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
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