STSETB, STSETLB -- A64

STSETB, STSETLB

Atomic bit set on byte in memory, without return, atomically loads an 8-bit byte from memory, performs a bitwise OR with the value held in a register on it, and stores the result back to memory.

STSETB has no memory ordering semantics.
STSETLB stores to memory with release semantics, as described in Load-Acquire, Store-Release.

For information about memory accesses, see Load/Store addressing modes.

This is an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB. This means:

The encodings in this description are named to match the encodings of LDSETB, LDSETAB, LDSETALB, LDSETLB.
The description of LDSETB, LDSETAB, LDSETALB, LDSETLB gives the operational pseudocode for this instruction.

Integer
(FEAT_LSE)

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	1	1	1	0	0	0	0	R	1	Rs					0	0	1	1	0	0	Rn					1	1	1	1	1
size								A									opc										Rt

No memory ordering (R == 0)

STSETB <Ws>, [<Xn|SP>] // (PSTATE.C64 == '0')

STSETB <Ws>, [<Cn|CSP>] // (PSTATE.C64 == '1')

is equivalent to

LDSETB <Ws>, WZR, <Addressing_Mode>

and is always the preferred disassembly.

Release (R == 1)

STSETLB <Ws>, [<Xn|SP>] // (PSTATE.C64 == '0')

STSETLB <Ws>, [<Cn|CSP>] // (PSTATE.C64 == '1')

is equivalent to

LDSETLB <Ws>, WZR, <Addressing_Mode>

and is always the preferred disassembly.

Assembler Symbols

<Ws>	Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

<Cn|CSP>

Is the name of the capability register or capability stack pointer holding the base address, encoded in the "Rn" field.

Operation

The description of LDSETB, LDSETAB, LDSETALB, LDSETLB gives the operational pseudocode for this instruction.