Shift Right Narrow (immediate). This instruction reads each unsigned integer value from the source SIMD&FP register, right shifts each result by an immediate value, puts the final result into a vector, and writes the vector to the lower or upper half of the destination SIMD&FP register. The destination vector elements are half as long as the source vector elements. The results are truncated. For rounded results, see RSHRN.
The RSHRN instruction writes the vector to the lower half of the destination register and clears the upper half, while the RSHRN2 instruction writes the vector to the upper half of the destination register without affecting the other bits of the register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | != 0000 | immb | 1 | 0 | 0 | 0 | 0 | 1 | Rn | Rd | |||||||||||||
| immh | op | ||||||||||||||||||||||||||||||
integer d = UInt(Rd); integer n = UInt(Rn); if immh == '0000' then SEE(asimdimm); if immh<3> == '1' then UNDEFINED; integer esize = 8 << HighestSetBit(immh); integer datasize = 64; integer part = UInt(Q); integer elements = datasize DIV esize; integer shift = (2 * esize) - UInt(immh:immb); boolean round = (op == '1');
| <Vd> |
Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
| <Tb> |
Is an arrangement specifier,
encoded in
immh:Q:
|
| <Vn> |
Is the name of the SIMD&FP source register, encoded in the "Rn" field. |
| <Ta> |
Is an arrangement specifier,
encoded in
immh:
|
| <shift> |
Is the right shift amount, in the range 1 to the destination element width in bits,
encoded in
immh:immb:
|
CheckFPAdvSIMDEnabled64(); bits(datasize*2) operand = V[n]; bits(datasize) result; integer round_const = if round then (1 << (shift - 1)) else 0; integer element; for e = 0 to elements-1 element = (UInt(Elem[operand, e, 2*esize]) + round_const) >> shift; Elem[result, e, esize] = element<esize-1:0>; Vpart[d, part] = result;
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
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