Signed Divide divides a signed integer register value by another signed integer register value, and writes the result to the destination register. The condition flags are not affected.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | Rm | 0 | 0 | 0 | 0 | 1 | 1 | Rn | Rd | ||||||||||||
| o1 | |||||||||||||||||||||||||||||||
integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer datasize = if sf == '1' then 64 else 32; boolean unsigned = (o1 == '0');
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Wn> |
Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field. |
| <Wm> |
Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field. |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field. |
| <Xm> |
Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field. |
bits(datasize) operand1 = X[n]; bits(datasize) operand2 = X[m]; integer result; if IsZero(operand2) then result = 0; else result = RoundTowardsZero(Real(Int(operand1, unsigned)) / Real(Int(operand2, unsigned))); X[d] = result<datasize-1:0>;
Internal version only: isa v32.13, AdvSIMD v29.04, pseudocode morello-2022-01_rc2, capabilities morello-2022-01_rc2 ; Build timestamp: 2022-01-11T11:23
Copyright © 2010-2022 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.