Unsigned shift left long (immediate)
This instruction reads each vector element in the lower or upper half of the source SIMD&FP register, shifts the unsigned integer value left by the specified number of bits, places the result into a vector, and writes the vector to the destination SIMD&FP register. The destination vector elements are twice as long as the source vector elements.
The USHLL instruction extracts vector elements from the lower half of the source register. The USHLL2 instruction extracts vector elements from the upper half of the source register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
This instruction is used by the alias UXTL, UXTL2.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | Q | 1 | 0 | 1 | 1 | 1 | 1 | 0 | != 0000 | immb | 1 | 0 | 1 | 0 | 0 | 1 | Rn | Rd | |||||||||||||
U | immh | opcode |
if !IsFeatureImplemented(FEAT_AdvSIMD) then EndOfDecode(Decode_UNDEF); if immh == '0000' then SEE(asimdimm); if immh<3> == '1' then EndOfDecode(Decode_UNDEF); constant integer d = UInt(Rd); constant integer n = UInt(Rn); constant integer esize = 8 << HighestSetBitNZ(immh<2:0>); constant integer datasize = 64; constant integer part = UInt(Q); constant integer elements = datasize DIV esize; constant integer shift = UInt(immh:immb) - esize; constant boolean unsigned = TRUE;
<Vd> |
Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
<Ta> |
Is an arrangement specifier,
encoded in
|
<Vn> |
Is the name of the SIMD&FP source register, encoded in the "Rn" field. |
<Tb> |
Is an arrangement specifier,
encoded in
|
<shift> |
Is the left shift amount, in the range 0 to the source element width in bits minus 1,
encoded in
|
Alias | Is preferred when |
---|---|
UXTL, UXTL2 | immb == '000' && BitCount(immh) == 1 |
CheckFPAdvSIMDEnabled64(); constant bits(datasize) operand = Vpart[n, part, datasize]; bits(datasize*2) result; integer element; for e = 0 to elements-1 element = Int(Elem[operand, e, esize], unsigned) << shift; Elem[result, e, 2*esize] = element<2*esize-1:0>; V[d, datasize*2] = result;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18
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