Dot product with unsigned and signed integers (vector)
This instruction performs the dot product of the four unsigned 8-bit integer values in each 32-bit element of the first source register with the four signed 8-bit integer values in the corresponding 32-bit element of the second source register, accumulating the result into the corresponding 32-bit element of the destination register.
From Armv8.2 to Armv8.5, this is an OPTIONAL instruction. From Armv8.6 it is mandatory for implementations that include Advanced SIMD to support it. ID_AA64ISAR1_EL1.I8MM indicates whether this instruction is supported.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | Q | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | Rm | 1 | 0 | 0 | 1 | 1 | 1 | Rn | Rd | ||||||||||||
| U | size | opcode | |||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_I8MM) then EndOfDecode(Decode_UNDEF); constant integer d = UInt(Rd); constant integer n = UInt(Rn); constant integer m = UInt(Rm); constant integer datasize = 64 << UInt(Q); constant integer elements = datasize DIV 32;
| <Vd> |
Is the name of the SIMD&FP third source and destination register, encoded in the "Rd" field. |
| <Ta> |
Is an arrangement specifier,
encoded in
|
| <Vn> |
Is the name of the first SIMD&FP source register, encoded in the "Rn" field. |
| <Tb> |
Is an arrangement specifier,
encoded in
|
| <Vm> |
Is the name of the second SIMD&FP source register, encoded in the "Rm" field. |
CheckFPAdvSIMDEnabled64(); constant bits(datasize) operand1 = V[n, datasize]; constant bits(datasize) operand2 = V[m, datasize]; constant bits(datasize) operand3 = V[d, datasize]; bits(datasize) result; for e = 0 to elements-1 bits(32) res = Elem[operand3, e, 32]; for b = 0 to 3 constant integer element1 = UInt(Elem[operand1, 4 * e + b, 8]); constant integer element2 = SInt(Elem[operand2, 4 * e + b, 8]); res = res + element1 * element2; Elem[result, e, 32] = res; V[d, datasize] = result;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18
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