Store shared hint
This instruction signals to the memory system that if the next instruction in program order generates an explicit write effect, then it is to a location that one or more other threads of execution will observe, and there is a performance benefit to ensuring that the updated value from the write to that location propagates to those other observers with minimal latency.
The thread of execution on the other observers might be polling the location using load or load-exclusive instructions, or may have executed a PRFM IR instruction targeting the location.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | x | 1 | 1 | 1 | 1 | 1 |
| CRm | op2 | ||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_PCDPHINT) then EndOfDecode(Decode_NOP); constant boolean stream = op2<0> == '1';
Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18
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