STFMAXNM, STFMAXNML

Floating-point atomic maximum number in memory, without return

This instruction atomically loads a 16-bit, 32-bit, or 64-bit value from memory, computes the floating-point maximum number with the value held in a register, and stores the result back to memory.

• STFMAXNML stores to memory with release semantics.
• STFMAXNM has no release semantics.

This instruction:

• Disables alternative floating-point behaviors, as if FPCR.AH is 0.
• Generates only the default NaN, as if FPCR.DN is 1.
• Does not modify the cumulative FPSR exception bits (IDC, IXC, UFC, OFC, DZC, and IOC).
• Disables trapped floating-point exceptions, as if the FPCR trap enable bits (IDE, IXE, UFE, OFE, DZE, and IOE) are all zero.

For more information about memory ordering semantics, see Load-Acquire, Store-Release.

For information about addressing modes, see Load/Store addressing modes.

Floating-point
(FEAT_LSFE)

Decode for all variants of this encoding

if !IsFeatureImplemented(FEAT_LSFE) then EndOfDecode(Decode_UNDEF); constant integer s = UInt(Rs); constant integer n = UInt(Rn); constant integer datasize = 8 << UInt(size); constant boolean acquire = FALSE; constant boolean release = R == '1'; constant boolean tagchecked = n != 31;