Enables access to Streaming SVE mode and SME architectural state
This instruction enables access to Streaming SVE mode and SME architectural state.
SMSTART enters Streaming SVE mode, and enables the SME ZA storage.
SMSTART SM enters Streaming SVE mode, but does not enable the SME ZA storage.
SMSTART ZA enables the SME ZA storage, but does not cause an entry to Streaming SVE mode.
This is an alias of MSR (immediate). This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | x | x | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| op1 | CRm | op2 | Rt | ||||||||||||||||||||||||||||
SMSTART {<option>}
is equivalent to
MSR <pstatefield>, #1
and is always the preferred disassembly.
The description of MSR (immediate) gives the operational pseudocode for this instruction.
Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18
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