FRINT<r> -- A64

Round to an integral floating-point value with the specified rounding option from each active floating-point element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified or are set to zero, depending on whether merging or zeroing predication is selected.

<r>	Rounding Option
N	to nearest, with ties to even
A	to nearest, with ties away from zero
M	toward minus Infinity
P	toward plus Infinity
Z	toward zero
I	current FPCR rounding mode
X	current FPCR rounding mode, signalling inexact

Current mode signalling inexact, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = TRUE; constant FPRounding rounding = FPRoundingMode(FPCR); constant boolean merging = TRUE;

Current mode signalling inexact, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = TRUE; constant FPRounding rounding = FPRoundingMode(FPCR); constant boolean merging = FALSE;

Current mode, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRoundingMode(FPCR); constant boolean merging = TRUE;

Current mode, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRoundingMode(FPCR); constant boolean merging = FALSE;

Nearest with ties to away, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEAWAY; constant boolean merging = TRUE;

Nearest with ties to away, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEAWAY; constant boolean merging = FALSE;

Nearest with ties to even, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEEVEN; constant boolean merging = TRUE;

Nearest with ties to even, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_TIEEVEN; constant boolean merging = FALSE;

Toward zero, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_ZERO; constant boolean merging = TRUE;

Toward zero, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_ZERO; constant boolean merging = FALSE;

Toward minus infinity, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_NEGINF; constant boolean merging = TRUE;

Toward minus infinity, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_NEGINF; constant boolean merging = FALSE;

Toward plus infinity, merging
(FEAT_SVE || FEAT_SME)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_POSINF; constant boolean merging = TRUE;

Toward plus infinity, zeroing
(FEAT_SVE2p2 || FEAT_SME2p2)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p2) && !IsFeatureImplemented(FEAT_SME2p2) then EndOfDecode(Decode_UNDEF); if size == '00' then EndOfDecode(Decode_UNDEF); constant integer esize = 8 << UInt(size); constant integer g = UInt(Pg); constant integer n = UInt(Zn); constant integer d = UInt(Zd); constant boolean exact = FALSE; constant FPRounding rounding = FPRounding_POSINF; constant boolean merging = FALSE;

Assembler Symbols

<Zd>	Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size	<T>
00	RESERVED
01	H
10	S
11	D

<Pg>	Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>	Is the name of the source scalable vector register, encoded in the "Zn" field.

Operation

CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(PL) mask = P[g, PL]; constant bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL); bits(VL) result = if merging then Z[d, VL] else Zeros(VL); for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then constant bits(esize) element = Elem[operand, e, esize]; Elem[result, e, esize] = FPRoundInt(element, FPCR, rounding, exact); Z[d, VL] = result;

Operational information

For the "Current mode signalling inexact, merging" , "Current mode, merging" , "Nearest with ties to away, merging" , "Nearest with ties to even, merging" , "Toward zero, merging" , "Toward minus infinity, merging" , "Toward plus infinity, merging" variants:

The merging variant of this instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and the merging variant of this instruction is CONSTRAINED UNPREDICTABLE:

The MOVPRFX can be predicated or unpredicated.
A predicated MOVPRFX must use the same governing predicate register as the merging variant this instruction.
A predicated MOVPRFX must use the larger of the destination element size and first source element size in the preferred disassembly of the merging variant of this instruction.
The MOVPRFX must specify the same destination register as the merging variant of this instruction.
The destination register must not refer to architectural register state referenced by any other source operand register of the merging variant of this instruction.

Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	1	1	0	0	1	0	1	size		0	0	0	1	1	0	1	0	1	Pg			Zn					Zd
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0	1	1	0	0	1	0	0	size		0	1	1	0	0	1	1	1	0	Pg			Zn					Zd
															op		opc2

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0	1	1	0	0	1	0	1	size		0	0	0	1	1	1	1	0	1	Pg			Zn					Zd
													opc

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0	1	1	0	0	1	0	0	size		0	1	1	0	0	1	1	1	1	Pg			Zn					Zd
															op		opc2

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0	1	1	0	0	1	0	1	size		0	0	0	1	0	0	1	0	1	Pg			Zn					Zd
													opc