Extract vector from pair of vectors
Copy the indexed byte up to the last byte of the first source vector to the bottom of the result vector, then fill the remainder of the result starting from the first byte of the second source vector. The result is placed destructively in the destination and first source vector, or constructively in the destination vector. This instruction is unpredicated.
An index that is greater than or equal to the vector length in bytes is treated as zero, resulting in the first source vector being copied to the result unchanged.
It has encodings from 2 classes: Constructive and Destructive
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | imm8h | 0 | 0 | 0 | imm8l | Zn | Zd | ||||||||||||||
if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8; constant integer dst = UInt(Zd); constant integer s1 = UInt(Zn); constant integer s2 = (s1 + 1) MOD 32; constant integer position = UInt(imm8h:imm8l) * 8;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | imm8h | 0 | 0 | 0 | imm8l | Zm | Zdn | ||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); constant integer esize = 8; constant integer dst = UInt(Zdn); constant integer s1 = dst; constant integer s2 = UInt(Zm); constant integer position = UInt(imm8h:imm8l) * 8;
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn1> |
Is the name of the first scalable vector register of the source multi-vector group, encoded in the "Zn" field. |
| <Zn2> |
Is the name of the second scalable vector register of the source multi-vector group, encoded in the "Zn" field. |
| <imm> |
Is the unsigned immediate operand, in the range 0 to 255, encoded in the "imm8h:imm8l" fields. |
| <Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; constant bits(VL) operand1 = Z[s1, VL]; constant bits(VL) operand2 = Z[s2, VL]; bits(VL) result; constant bits(VL*2) concat = operand2 : operand1; if position >= VL then result = concat<VL-1:0>; else result = concat<(position+VL)-1:position>; Z[dst, VL] = result;
For the "Constructive" variant:
If PSTATE.DIT is 1:
For the "Destructive" variant:
If PSTATE.DIT is 1:
The destructive variant of this instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and the destructive variant of this instruction is CONSTRAINED UNPREDICTABLE:
Internal version only: aarchmrs v2024-12_rel, pseudocode v2024-12_rel ; Build timestamp: 2024-12-15T22:18
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